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# DIV -- Unsigned Divide

```Opcode    Instruction        Clocks   Description

F6 /6     DIV AL,r/m8        14/17    Unsigned divide AX by r/m byte
(AL=Quo, AH=Rem)
F7 /6     DIV AX,r/m16       22/25    Unsigned divide DX:AX by r/m
word (AX=Quo, DX=Rem)
F7 /6     DIV EAX,r/m32      38/41    Unsigned divide EDX:EAX by r/m
dword (EAX=Quo, EDX=Rem)
```

## Operation

```temp := dividend / divisor;
IF temp does not fit in quotient
THEN Interrupt 0;
ELSE
quotient := temp;
remainder := dividend MOD (r/m);
FI;
```

### Note

Divisions are unsigned. The divisor is given by the r/m operand. The dividend, quotient, and remainder use implicit registers. Refer to the table under "Description"

## Description

DIV performs an unsigned division. The dividend is implicit; only the divisor is given as an operand. The remainder is always less than the divisor. The type of the divisor determines which registers to use as follows:
```
Size    Dividend     Divisor   Quotient   Remainder
byte    AX           r/m8       AL          AH
word    DX:AX        r/m16      AX          DX
dword   EDX:EAX      r/m32      EAX         EDX
```

## Flags Affected

OF, SF, ZF, AR, PF, CF are undefined.

## Protected Mode Exceptions

Interrupt 0 if the quotient is too large to fit in the designated register (AL, AX, or EAX), or if the divisor is 0; #GP(0) for an illegal memory operand effective address in the CS, DS, ES, FS, or GS segments; #SS(0) for an illegal address in the SS segment; #PF(fault-code) for a page fault